Yesin Ryu’s paper, “Native DRAM Cache: Re-architecting DRAM as a Large-Scale Cache for Data Centers”, has been accepted at the IEEE Micro Top Picks as Honorable Mention. Each year, IEEE Micro selects the top 24 papers from research published in the leading computer architecture conferences (ISCA, MICRO, HPCA, and ASPLOS). Congratulations on this remarkable achievement!