[C41] TRAC: Transparent Row Activation Counting for Efficient RowHammer Monitoring
[C40] Cerberus: Cross-Layer ECC Co-Design for Robust and Efficient Memory Protection
[C39] RangeGuard: Efficient, Bounded Approximate Error Correction for Reliable DNNs
[J13] Efficient Neural Network Acceleration Using Redundant Residue Number systems
[C38] RowArmor: Efficient and Comprehensive Protection Against DRAM Disturbance Attacks
[J12] Efficient Modular Addition for FPGA-Based Cryptographic Operations
[C37] Scaling Out Chip Interconnect Networks with Implicit Sequence Numbers
[C36] Hidden Refresh: Reducing DRAM Refresh Overhead for Improved Performance
[C35] Compression to Colocate: Enabling Tag and Data Colocation via Data Compression in DRAM Cache
[C34] Partial-Chip Extensions of Single-Chip Erasure Decoding for Flexible Use of Redundancy
[C33] Characterization of the Impact of Migration Granularity on GPU Unified Memory I/O
[C32] SPRINT: Selective Partial Region-based Invalidation for Neutralizing Thrashing in GPU Unified Memory
[C31] PoP-ECC: Robust and Flexible Error Correction against Multi-Bit Upsets in DNN Accelerators
[C30] PIMPAL: Accelerating LLM Inference on Edge Devices via In-DRAM Arithmetic Lookup
[C29] Generic Modulo-(2^n±δ) Addition Algorithm via Two-Valued Digit Encoding
[J11] RowHammer 공격과 방어: 기술적 진화와 도전 과제
[J10] Auto Digit Selection for Most Significant Digit First Multiplication
[C28] ROSE: Reliability-Optimized OD-ECC and S-ECC Enhancements for HBM3
[C27] C4ECC: Data Compression for Bandwidth Efficiency Under ECC Protection in GPUs
[J9] Crumbled Cookies: Exploring E-commerce Websites? Cookie Policies with Data Protection Regulations
[C26] Dual-Axis ECC: Vertical and Horizontal Error Correction for Storage and Link Errors
[C25] CacheCraft: Enhancing GPU Performance under Memory Protection through Reconstructed Caching
[C24] LEAP: LLW RowHammer Mitigation System
[C23] INC: In channel Crossing ECC for LPDDR Compression Attached Memory Module
[C22] Evaluating the Impact of In-band ECC on GPU Performance
[C21] Native DRAM Cache: Re-architecting DRAM as a Large-Scale Cache for Data Centers
[J8] A DNN Partitioning Framework with Controlled Lossy Mechanisms for Edge-Cloud Collaborative Intelligence
Hyochan Kim, Ji Sub Choi, Jungrae Kim, Jong Hwan Ko
Future Generation Computer Systems, Journal, May 2024, impact factor=6.2, JCR rank 90.6 pth
Link: [Paper]
[C20] SELCC: Enhancing MLC Reliability and Endurance with Single Cell Error Correction Codes
[C19] Agile-DRAM: Agile Trade-Offs in Memory Capacity, Latency, and Energy for Data Centers
[C18] Synergizing CXL With Unified Memory for Scalable GPU Memory Expansion
Junseung Lee and Jungrae Kim
The International Conference on Electronics, Information, and Communication (ICEIC), Jan. 2024
[C17] Unity ECC: Unified Memory Protection Against Bit and Chip Errors
[C16] Synergistic Integration: An Optimal Combination of On-Die and Rank-Level ECC for Enhanced Reliability
Wonyeong Jung, Dongwhee Kim, and Jungrae Kim
The 20th International SoC Conference (ISOCC), Oct. 2023
[C15] SCC: Efficient Error Correction Codes for MLC PCM
Yujin Lim, Dongwhee Kim, and Jungrae Kim
The International SoC Conference (ISOCC), Oct. 2023
[C14] CPR: Correlation-based Page Remapping
Hojung Namkoong, and Jungrae Kim
The International SoC Conference (ISOCC), Oct. 2023
[C13] EPA ECC : Error-Pattern-Aligned ECC for HBM2E
Kiheon Kwon, Dongwhee Kim, Soyoung Park, and Jungrae Kim
The International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), June. 2023
Link: [Paper]
[C12] UVMMU: Hardware-Offloaded Page Migration for Heterogeneous Computing
Jihun Park, Donghun Jeong, and Jungrae Kim
The Design, Automation and Test in Europe Conference (DATE), acceptance rate = 25%, Apr. 2023
Link: [Paper]
[Slides(pptx)]
[J7] DNN Retraining Method Reducing Accuracy Degradation in Packet-Lossy Environments
Dongwhee Kim*, Yujin Lim*, Syngha Han, and Jungrae Kim
Journal of KIISE, Journal, March. 2023
* Joint First Authors
Link: [Paper]
[C11] YOCO: Unified and Efficient Memory Protection for High Bandwidth Memory
Dongwhee Kim, and Jungrae Kim
The International SoC Conference (ISOCC), Oct. 2022
Link: [Paper]
[C10] Adaptive Granularity On-die ECC
Daero Kim, and Jungrae Kim
The International SoC Conference (ISOCC), Oct. 2022
Link: [Paper]
[J6] SEC-BADAEC: An Efficient ECC with No Vacancy for Strong Memory Protection
Yuseok Song, Sangjae Park, Michael B. Sullivan, and Jungrae Kim
IEEE ACCESS, impact factor = 3.476, July. 2022
Link: [Paper]
[J5] Demand MemCpy: Overlapping of Computation and Data Transfer for Heterogeneous Computing
Donghun Jeong, Jihun Park, and Jungrae Kim
IEEE ACCESS, impact factor = 3.476, July. 2022
Link: [Paper]
[J4] On-the-Fly Lowering Engine: Offloading Data Layout Conversion for Convolutional Neural Networks
MinGu Kang, Sang Min Hyun, Tae Hee Han, Jungrae Kim*, and Seokin Hong*
IEEE ACCESS, impact factor = 3.476, July. 2022
* Corresponding Authors
Link: [Paper]
[J3] On-die Dynamic Remapping Cache: Strong and Independent Protection against Intermittent Faults
Sangjae Park and Jungrae Kim
IEEE ACCESS, impact factor = 3.476, July. 2022
Link: [Paper]
[J2] Multi-Prediction Compression: An Efficient and Scalable Memory Compression Framework for GP-GPU
Hoyong Jin, Donghun Jeong, Taewon Park, Jong Hwan Ko, and Jungrae Kim
IEEE Computer Architecture Letters, impact factor = 2.118, May. 2022
Link: [Paper]
[C9] A Weight-Sharing Autoencoder with Dynamic Quantization for Efficient Feature Compression
Ji Sub Choi, Jungrae Kim, Jong Hwan Ko
International Conference on ICT Convergence, pp.1111-1113, Oct 2021
[J1] Auto-Tiler: Variable-Dimension Autoencoder with Tiling for Compressing Intermediate Feature Space of Deep Neural Networks for Internet of Things
Jeongsoo Park, Jungrae Kim, Jong Hwan Ko
MDPI Sensors, impact factor = 3.275, Jan. 2021
[C8] DUO: Exposing On-chip Redundancy to Rank-level ECC for High Reliability
Seong-Lyong Gong, Jungrae Kim, Sangkug Lym, Michael Sullivan, Howard David, Mattan Erez
The IEEE International Symposium on High Performance Computer Architecture (HPCA), acceptance rate = 21%, Feb. 2018.
Link: [Paper]
[C7] ERUCA: Efficient DRAM Resource Utilization and Resource Conflict Avoidance for Memory System Parallelism
Sangkug Lym, Heonjae Ha, Yongkee Kwon, Chun-kai Chang, Jungrae Kim, Mattan Erez
The IEEE International Symposium on High Performance Computer Architecture (HPCA), acceptance rate = 21%, Feb. 2018.
Link: [Paper]
[C6] DRAM Scaling Error Evaluation Model with Various Retention Time
[T2] Strong, Thorough, and Efficient Memory Protection against Existing and Emerging DRAM Errors
Jungrae Kim
Ph.D Thesis / The University of Texas at Austin, Dec. 2016.
[C5] Bit-Plane Compression: Transforming Data for Better Compression in Many-core Architectures
Jungrae Kim, Michael Sullivan, Esha Choukse, Mattan Erez
The ACM/IEEE International Symposium on Computer Architecture (ISCA), acceptance rate = 19%, June 2016.
Link: [Paper]
[C4] All-Inclusive ECC: Thorough End-to-End Protection for Reliable Computer Memory
Jungrae Kim, Michael Sullivan, Sangkug Lym, Mattan Erez
The ACM/IEEE International Symposium on Computer Architecture (ISCA), acceptance rate = 19%, June 2016.
Link: [Paper]
[C3] CLEAN-ECC: High Reliability ECC for Adaptive Granularity Memory System
Seong-Lyong Gong, Minsoo Rhu, Jungrae Kim, Jinsuk Chung, Mattan Erez
The Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), acceptance rate = 22%, Dec. 2015.
Link: [Paper]
[C2] Frugal ECC: Efficient and Versatile Memory Error Protection through Fine-grained Compression
Jungrae Kim, Michael Sullivan, Seong-Lyong Gong, Mattan Erez
The International Conference on High Performance Computing, Networking, Storage and Analysis (SC), acceptance rate: 22%, Nov. 2015.
Link: [Paper]
[C1] Bamboo ECC: Strong, Safe, and Flexible Codes for Reliable Computer Memory
[T1] Lazy Register Reconcile for Local Register Allocation
Jungrae Kim
MS Thesis / Seoul National University, Aug. 2003.
[P12] Method and apparatus for providing virtual memory management of heterogeneous systems
[P11] Memory device and operating methods thereof
[P10] Dram and control mathod for the same
[P9] Method for generating burst error correction code, device for generating burst error correction code, and recording medium storing instructions to perform method for generating burst error correction code
[P8] Semiconductor chip for correcting aligned error, semiconductor system for correcting aligned error, and method for correcting aligned error
[P7] Method for accerlerating computation of convolutional neural network and device of accerlerating computation of convolutional neural network
[P6] Apparatus and method for remapping of memory
[P5] Method and apparatus for generating code for single symbol error correction and double bit error correction
[SW2] ECC-ExerSim: Error-Correcting Code Exercise and Simulator
Dongwhee Kim, Taewon Park, and Jungrae Kim
Korea Copyright Commission (No. C-2023-043210), September 26, 2023.
Link: [Github]
[SW1] MRSim: Memory-Reliability Simulator
Jungrae Kim
Korea Copyright Commission (No. C-2022-031812), August 16, 2022.
[P4] Electronic Device Controller for Improving Performance of Electronic Device
Jungrae Kim
KR/JP/CN/US(#8,725,439), 2014.
[P3] Method and System Controlling Page Open Time for Memory Device
Jungrae Kim, and Wooil Kim
KR/EU/US(#8,688,942) / 2014.
[P2] Device and Method for Testing Semiconductor Device
Jungrae Kim
KR/US(#8,621,292) / 2013.
[P1] Hybrid Image Data Processing System and Method
Jungrae Kim, Jinpyo Park, Jaehong Park, Youngjun Kwon
KR/TW/CN/US(#8,229,235), 2012.